ArcDeviceIOControl.h

// +------------------------------------------------------------------------------------------------------------------+
// |  FILE:  ArcDeviceIOControl.h  ( GenIV )                                                                          |
// +------------------------------------------------------------------------------------------------------------------+
// |  PURPOSE: This file defines the ARC PCIe device driver io-control interface.                                     |
// |                                                                                                                  |
// |  AUTHOR:  Scott Streit         DATE: Jan 6, 2020                                                                 |
// |                                                                                                                  |
// |  Copyright 2020 Astronomical Research Cameras, Inc. All rights reserved.                                         |
// +------------------------------------------------------------------------------------------------------------------+
#pragma once
 
#include <cstdint>
 
#include <CArcDevice.h>
 
 
 
namespace arc
{
    namespace gen4
    {
 
        // +----------------------------------------------------------------------------------------------------------+
        // |  BAR definitions                                                                                         |
        // +----------------------------------------------------------------------------------------------------------+
        constexpr std::uint32_t BAR = 2;                                                
        constexpr std::uint32_t DEVICE_CLEAR_SEND_RECV_REG              = 0x2F0;        
        constexpr std::uint32_t DEVICE_CLEAR_SEND_RECV                  = 1;            
        constexpr std::uint32_t DEVICE_PIXEL_COUNTER_REG                = 0x40;         
        constexpr std::uint32_t DEVICE_RESET_PIXEL_COUNTER_REG          = 0x220;        
        constexpr std::uint32_t DEVICE_RESET_PIXEL_COUNTER              = 1;            
        constexpr std::uint32_t DEVICE_BUFFER_0_BYTES_RECVD_REG         = 0x320;        
        constexpr std::uint32_t DEVICE_BUFFER_0_STATUS_REG              = 0x340;
 
        constexpr std::uint32_t DEVICE_BUFFER_1_BYTES_RECVD_REG         = 0x330;        
        constexpr std::uint32_t DEVICE_BUFFER_1_STATUS_REG              = 0x350;
 
        constexpr std::uint32_t DEVICE_BUFFER_STATUS_DIRTY_MASK         = 1;            
        constexpr std::uint32_t DEVICE_BUFFER_STATUS_CLEAN_MASK         = 1;            
        constexpr std::uint32_t DEVICE_BUFFER_STATUS_COMPLETE_MASK      = 2;            
        constexpr std::uint32_t DEVICE_BUFFER_STATUS_OVERFLOW_MASK      = 4;            
        constexpr std::uint32_t DEVICE_BUFFER_STATUS_CLEAR              = 7;            
        constexpr std::uint32_t DEVICE_STATUS_REG                       = 0x100;
 
        constexpr std::uint32_t DEVICE_STATUS_ALERT_MASK                = 0x2;          
        constexpr std::uint32_t DEVICE_STATUS_IMAGE_ADDRESS_ERROR_MASK  = 0x80;         
        constexpr std::uint32_t DEVICE_ALERT_PACKET_REG                 = 0x2000;       
        constexpr std::uint32_t CLEAR_IMAGE_ADDRESS_ERROR               = 4;            
        // +----------------------------------------------------------------------------------------------------------+
        // |  Device I/O control commands                                                                             |
        // +----------------------------------------------------------------------------------------------------------+
 
        enum class IOCtrlCode_e : std::uint32_t
        {
            READ_BAR = 0x01,                
            READ_BAR64,                     
            WRITE_BAR,                      
            WRITE_BAR64,                    
            READ_CFG_8,                     
            READ_CFG_16,                    
            READ_CFG_32,                    
            READ_CFG_64,                    
            WRITE_CFG_8,                    
            WRITE_CFG_16,                   
            WRITE_CFG_32,                   
            MEM_MAP,                        
            MEM_UNMAP,                      
            COMMONBUFFER_PA,                
            COMMONBUFFER_SIZE,              
            COMMONBUFFER_RING_BUFFERS       
        };
 
    }       // end gen4 namespace
}           // end arc namespace